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 TM 55-1905-219-14-9
4-64.1. TANK LEVEL INDICATION-RECEIVER-MAINTENANCE INSTRUCTIONS
(Continued).
coil after the delay of the alarm signal pulse. Diode CR6 connected across the relay coils protects transistor Q1
from voltages generated by the reverse current flow produced when the electromagnetic field of the relays
collapses.
(3) High and Low Alarm Control Modules.
In the level indication circuit of the control module, RP1 and resistor R1 from a voltage divider with the
transmitter and/or level link combination that is connected to terminal 2 of the module. Adjusting the setting of
the potentiometer changes the portion of the +17 volt dc supply at pin 1 that is connected across-the level
detector as a calibrated voltage. The potentiometer is set to produce a maximum deflection of the meter(s)
associated with the control module when the fluid level in the tank is at a maximum value.
(4) The output of the fluid level detector (a level voltage) is fed to pin 3 of the control module to be
dropped across resistor R2 and capacitor C1. This RC combination is an intergrating network that smoothes or
dampens fluid transients. The voltage to which capacitor C1 charges is fed through resistor R3 to the meters(s)
connected at pin 4.
(5) The level voltage is also fed to the input network of threshold detector stage Q1 via steering diode
D1 in alarm circuit No. l. Capacitor C2 and resistor R4 filter the level voltage for application through resistor R5
to the gate of junction field-effect transistor (J-FET)Q1. The source of J-FETQ1 is biased by the output of a
voltage divider network consisting of potentiometer RP2 and resistors R7 and R6. The amplitude of this bias is
established by the setting of potentiometer RP2 which is adjusted for the desired level alarm threshold of the
tank fluid. The gate of J-FETQ1 is at a bias voltage maintained by the transmitter. Zener diode CRZ1 protects
the input from voltage levels that rise above 20 volts.
(6) When the level voltage at the gate exceeds the bias at the source, drain current flows from J-
FETQ1, turning on switch Q2. When switch Q2 is turned on, current flows through voltage divider resistors R8
and R9 and into transistor Q2. The voltage at the intersection of resistors R8 and R9 is then sufficiently
positive to produce conduction in relay driver Q3-Q4. Relay driver Q3 and Q4 is a power amplifier that
energizes relay K1 when current flows. Diode CR9 connected across the coil of relay K1 suppresses reverse
current flow that could damage transistors Q3 and Q4.
4-1334
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